The semiconductor memory device is broadly divided into a RAM (Random Access Memory) and a ROM (Read Only Memory). As for the RAM, there is no limit on the number of writing operations, but it has the problem that retained data is lost at the time of power-supply disconnection, so that high power consumption is needed for retaining data during a standby period. Meanwhile, as for the ROM, data can be retained at the time of power-supply disconnection, but there is a limit on the number of writing operations, so that it cannot be used for a case where the writing operations are frequently needed. Therefore, research and development have been carried out for an ideal NVRAM (Nonvolatile Random Access Memory) through the ages because there is no limit on the number of writing operations and written data can be retained with super-low power consumption, but it has not been commercialized yet.
As for the insulated gate FET such as a MOSFET formed of oxide semiconductor having higher bandgap energy than silicon, it is expected that a leak current can be extremely small compared to a silicon MOSFET, so that development of the NVRAM using the oxide semiconductor MOSFET has been reported in Non Patent Document 1 described below.
As shown in FIG. 15, a memory cell disclosed in Non Patent Document 1 includes an ordinal silicon MOSFET 30, a capacitive element 31 having one end connected to a gate FN of the silicon MOSFET 30, and an oxide semiconductor MOSFET 32 in which one of a source and a drain is connected to the gate FN. The silicon MOSFET 30 and the capacitive element 31 simulatively form a silicon MOSFET (memory element) having a stacked gate structure formed of a floating gate and a control gate, and used in a memory cell in a conventional flash memory. According to the conventional flash memory, a charge is transferred from or to the floating gate through a thin gate insulating film by hot electron injection or FN tunneling, while according to the memory cell having the circuit configuration shown in FIG. 15, a charge is transferred through the oxide semiconductor MOSFET 32. As a result, it is not necessary to generate a high electric filed to transfer the charge from or to the floating gate FN, so that data can be written at low voltage and high speed, and there is no limit on the number of writing operations. In addition, a leak current of the oxide semiconductor MOSFET 32 is extremely small, so that the charge stored in the floating gate FN can be retained stably for a long time.
Prior Art Document
Non Patent Document
Non Patent Document 1: Takanori Matsuzaki, et al., “1 Mb Non-Volatile Random Access Memory Using Oxide Semiconductor”, Memory Workshop (IMW), 2011 3rd IEEE International, May 2011.